It is known to provide branch prediction mechanisms which seek to predict whether or not branch instructions will or will not result in a branch being taken (i.e. a non-sequential change in program instruction fetch address) and direct the instruction fetching accordingly. Within pipelined systems the consequences of mispredicting a branch are significant as the pipeline must be flushed before instructions fetched from the correct fetch address can be executed.
Various techniques are known for predicting branch outcomes and these include mechanisms which store a history value indicating the branch outcomes of a preceding sequence of branch instructions which have been encountered and use this history value to index into a branch history buffer storing a prediction for the branch outcome of a newly encountered branch instruction. The previous branch history as characterised by the stored history value is a way of identifying a newly encountered branch instruction by correlating it with previously encountered branch behavior and storing a predicted outcome which can be used for the newly encountered branch instruction. Branch history values are not unique to a particular branch instruction (different branch instructions having the same history value is known as aliasing) and accordingly in order to improve the differentiation between branch instructions encountered it is known to logically combine a history value of preceding outcomes with bits of the fetch address for the newly encountered branch instruction in order to index the branch history buffer. This increases the likelihood that branch instructions which share a common history value may nevertheless be differentiated by virtue of differing fetch addresses and accordingly separate prediction values for those different branch instructions can be stored and accessed.
There is a general requirement within data processing systems to reduce the amount of power consumed in operation. Whilst branch prediction mechanisms are effective in improving processing performance, the operation of these mechanisms consumes power. Reducing power consumption is advantageous for a number of reasons, including increasing battery life in portable devices, allowing lower temperature operation, reducing power loading within the integrated circuit and the like.